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BUK95/9640-100A
TrenchMOSTM logic level FET
Rev. 03 -- 08 February 2002 Product data
1. Description
N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOSTM technology, featuring very low on-state resistance. Product availability: BUK9540-100A in SOT78 (TO-220AB) BUK9640-100A in SOT404 (D2-PAK).
2. Features
s s s s TrenchMOSTM technology Q101 compliant 175 C rated Logic level compatible.
3. Applications
s Automotive and general purpose power switching: x 12 V, 24 V, and 42 V loads x Motors, lamps and solenoids.
4. Pinning information
Table 1: Pin 1 2 3 mb Pinning - SOT78 and SOT404, simplified outline and symbol Description gate (g)
mb d
Simplified outline
Symbol
drain (d) source (s)
[1]
mb
g s
mounting base; connected to drain (d)
MBB076
2
MBK106
123
1
3
MBK116
SOT78 (TO-220AB)
[1] It is not possible to make connection to pin 2 of the SOT404 package.
SOT404 (D2-PAK)
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
5. Quick reference data
Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tmb = 25 C; VGS = 5 V Tmb = 25 C Tj = 25 C; VGS = 5 V; ID = 25 A Tj = 25 C; VGS = 4.5 V; ID = 25 A Tj = 25 C; VGS = 10 V; ID = 25 A Typ 34 29 Max 100 39 158 175 40 43 39 Unit V A W C m m m drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance Symbol Parameter
6. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) Tmb = 25 C; VGS = 5 V; Figure 2 and 3 Tmb = 100 C; VGS = 5 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM drain current (peak value) total power dissipation storage temperature operating junction temperature reverse drain current peak reverse drain current Tmb = 25 C Tmb = 25 C; pulsed; tp 10 s unclamped inductive load; ID = 39 A; VDS 100 V; VGS = 5 V; RGS = 50 ; starting Tmb = 25 C Tmb = 25 C; pulsed; tp 10 s; Figure 3 Tmb = 25 C; Figure 1 RGS = 20 k Conditions Min -55 -55 Max 100 100 15 39 28 159 158 +175 +175 39 159 182 Unit V V V A A A W C C A A mJ
Source-drain diode
Avalanche ruggedness EDS(AL)S non-repetitive avalanche energy
9397 750 09162
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 -- 08 February 2002
2 of 14
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
120 Pder (%) 80
03na19
40 ID (A) 30
03nh74
20
40
10
0 0 50 100 150 200 Tmb ( C)
0 25 50 75 100 125 150 175 200 Tmb (C)
P tot P der = ---------------------- x 100% P
tot ( 25 C )
VGS 4.5 V
Fig 1. Normalized total power dissipation as a function of mounting base temperature.
Fig 2. Continuous drain current as a function of mounting base temperature.
103
03nh72
ID (A) tp = 10 s RDSon = VDS / ID
102
100 s 10
DC
1 ms
10 ms 100 ms 1 1 10 102 VDS (V) 103
Tmb = 25 C; IDM single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 09162
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 -- 08 February 2002
3 of 14
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
7. Thermal characteristics
Table 4: Rth(j-mb) Rth(j-a) Thermal characteristics Conditions Figure 4 Min Typ Max Unit - - - - 60 50 0.95 K/W - - K/W K/W thermal resistance from junction to mounting base Symbol Parameter
thermal resistance from junction to ambient vertical in still air; SOT78 package mounted on a printed circuit board; minimum footprint; SOT404 package
7.1 Transient thermal impedance
1 Zth(j-mb) (K/W) 0.2 10-1 0.1 0.05 0.02 = 0.5
03nh73
10-2 Single Shot
P
=
tp T
tp
t T
10-3 10-6 10-5 10-4 10-3 10-2 10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 09162
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 -- 08 February 2002
4 of 14
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
8. Characteristics
Table 5: Characteristics Tj = 25 C unless otherwise specified. Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions ID = 0.25 mA; VGS = 0 V Tj = 25 C Tj = -55 C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 Tj = 25 C Tj = 175 C Tj = -55 C IDSS drain-source leakage current VDS = 100 V; VGS = 0 V Tj = 25 C Tj = 175 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 10 V; VDS = 0 V VGS = 5 V; ID = 25 A; Figure 7 and 8 Tj = 25 C Tj = 175 C VGS = 4.5 V; ID = 25 A VGS = 10 V; ID = 25 A Dynamic characteristics Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf Ld total gate charge gate-to-source charge gate-to-drain (Miller) charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time internal drain inductance from drain lead 6 mm from package to centre of die from contact screw on mounting base to centre of die SOT78 from upper edge of drain mounting base to centre of die SOT404 Ls internal source inductance from source lead to source bond pad VDD = 30 V; RL = 1.2 ; VGS = 5 V; RG = 10 VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 12 VGS = 5 V; VDD = 80 V; ID = 25 A; Figure 14 48 5.4 20 2304 222 151 20 135 125 90 4.5 3.5 3072 266 207 nC nC nC pF pF pF ns ns ns ns nH nH 34 29 40 100 43 39 m m m m 0.05 2 10 500 100 A A nA 1 0.5 1.5 2 2.3 V V V 100 89 V V Min Typ Max Unit Static characteristics
-
2.5
-
nH
-
7.5
-
nH
9397 750 09162
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 -- 08 February 2002
5 of 14
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
Table 5: Characteristics...continued Tj = 25 C unless otherwise specified. Symbol VSD trr Qr Parameter source-drain (diode forward) voltage reverse recovery time recovered charge Conditions IS = 25 A; VGS = 0 V; Figure 15 IS = 37 A; dIS/dt = -100 A/s VGS = -10 V; VDS = 30 V Min Typ 0.85 60 240 Max 1.2 Unit V ns nC Source-drain diode
120 ID (A) 100
03na66
5.0 4.0
VGS = 10 (V)
34 RDSon (m) 32
03na64
80
30
60 3.0
28
40
20
2.4
26
0 0 2 4 6 8 10 VDS (V)
24 0 5 10 VGS (V) 15
Tj = 25 C; tp = 300 s
Tj = 25 C; ID = 25 A
Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values.
Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values.
50 RDSon (m) 45
03na67
2.8 a 2.6 2.4 2.2
03ng41
VGS = 3.0 (V) 3.2 3.4 3.6 4.0 5.0 10
2 1.8 1.6 1.4 1.2 1 0.8 0.6
40
35
30
25
0.4 0.2 0
10 20 30 40 50 60 ID (A) 70
20
-60
-20
20
60
100
140 180 Tj (C)
Tj = 25 C
R DSon a = ---------------------------R DSon ( 25 C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature.
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Fig 7. Drain-source on-state resistance as a function of drain current; typical values.
9397 750 09162
Product data
Rev. 03 -- 08 February 2002
6 of 14
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
2.5 VGS(th) (V) 2 max
03aa33
10-1 ID (A) 10-2
03aa36
typ 1.5 min 1
10-3
min
typ
max
10-4
0.5
10-5
0 -60 0 60 120 Tj ( C) 180
10-6 0 1 2 VGS (V) 3
ID = 1 mA; VDS = VGS
Tj = 25 C; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of junction temperature.
Fig 10. Sub-threshold drain current as a function of gate-source voltage.
80 gfs (S) 60
03na65
6000 C (pF) 5000
03na68
Ciss
4000 Coss
40
3000 Crss
2000
20
1000
0 0 10 20 30 ID (A) 40
0 10-2 10-1 1 10 VDS (V) 102
Tj = 25 C; VDS = 25 V
VGS = 0 V; f = 1 MHz
Fig 11. Forward transconductance as a function of drain current; typical values.
Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.
9397 750 09162
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 -- 08 February 2002
7 of 14
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
80 ID (A) 60
03na61
5 VGS (V) 4 VDD = 14 (V) 3
03na63
VDD = 80 (V)
40 2
20 1 Tj = 175 C 0 0 1 2 3 VGS (V) 4 Tj = 25 C 0 0 20 40 QG (nC) 60
VDS = 25 V
Tj = 25 C; ID = 25 A
Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values.
Fig 14. Gate-source voltage as a function of turn-on gate charge; typical values.
100 IS (A) 80
03na62
60
40 Tj = 175 C 20 Tj = 25 C
0 0.0 0.5 1.0 1.5 VSD (V) 2.0
VGS = 0 V
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.
9397 750 09162
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 -- 08 February 2002
8 of 14
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
9. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78
E p
A A1 q
D1
mounting base
D
L1(1)
L2 Q
L
b1
1
2
3
b c
e
e
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 4.5 4.1 A1 1.39 1.27 b 0.9 0.7 b1 1.3 1.0 c 0.7 0.4 D 15.8 15.2 D1 6.4 5.9 E 10.3 9.7 e 2.54 L 15.0 13.5 L1(1) 3.30 2.79 L2 max. 3.0 p 3.8 3.6 q 3.0 2.7 Q 2.6 2.2
Note 1. Terminals in this zone are not tinned. OUTLINE VERSION SOT78 REFERENCES IEC JEDEC 3-lead TO-220AB EIAJ SC-46 EUROPEAN PROJECTION ISSUE DATE 00-09-07 01-02-16
Fig 16. SOT78 (TO-220AB).
9397 750 09162 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 -- 08 February 2002
9 of 14
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads (one lead cropped)
SOT404
A E A1 mounting base
D1
D
HD
2
Lp
1
3
b c Q
e
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 4.50 4.10 A1 1.40 1.27 b 0.85 0.60 c 0.64 0.46 D max. 11 D1 1.60 1.20 E 10.30 9.70 e 2.54 Lp 2.90 2.10 HD 15.80 14.80 Q 2.60 2.20
OUTLINE VERSION SOT404
REFERENCES IEC JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 99-06-25 01-02-12
Fig 17. SOT404 (D2-PAK)
9397 750 09162 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 -- 08 February 2002
10 of 14
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
10. Soldering
handbook, full pagewidth
10.85 10.60 10.50 1.50 7.50 7.40 1.70
2.25 2.15
8.15
8.35
8.275 1.50
4.60
0.30 4.85
5.40 8.075
7.95
3.00
0.20
solder lands solder resist occupied area solder paste 5.08
1.20 1.30 1.55
MSD057
Dimensions in mm.
Fig 18. Reflow soldering footprint for SOT404.
9397 750 09162
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 -- 08 February 2002
11 of 14
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
11. Revision history
Table 6: Rev Date 03 20020208 Revision history CPCN Description Product data (9397 750 09162); third version; supersedes BUK95/9640-100A-02 of 01 May 2000. Modifications:
* * *
Conversion from Lotus Manuscript to Databuilder II Thermal resistance from junction to mounting base (Rth(j-mb)) value changed from 1.1 K/W to 0.95 K/W in Table 4 "Thermal characteristics" Changes in Table 3 "Limiting values": - Drain current (ID) and reverse drain current (IDR) value changed from 37 A to 39 A - Peak drain current (IDM) and peak reverse drain current (IDRM) value changed from 149 A to 159 A. - Total power dissipation (Ptot) value changed from 138 W to 158 W.
02 01
20000501 19991201
-
Product data; second version, supersedes BUK95/9640-100-01 of 01 December 1999. Produce data; initial version.
9397 750 09162
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 -- 08 February 2002
12 of 14
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
12. Data sheet status
Data sheet status[1] Objective data Preliminary data Product status[2] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Product data
Production
[1] [2]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
13. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
14. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
15. Trademarks
TrenchMOS -- is a trademark of Koninklijke Philips Electronics N.V.
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
9397 750 09162
Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 -- 08 February 2002
13 of 14
Philips Semiconductors
BUK95/9640-100A
TrenchMOSTM logic level FET
Contents
1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 14 15 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
(c) Koninklijke Philips Electronics N.V. 2002. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 08 February 2002 Document order number: 9397 750 09162

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